1. Technical Field
The present invention relates to a semiconductor apparatus, and more particularly, to a method for detecting and repairing a fail of an error detecting circuit and semiconductor apparatus including the same.
2. Related Art
A compressed test is used to reduce a test time. The compressed test is performed by writing the same data to a plurality of circuits and compressing and outputting the written data of the plurality of circuits. Since the semiconductor apparatus is divided into a plurality of circuits, a rate of fail detection and an efficiency of repair are determined by arrangement of circuits to be tested and the combination of data in the compressed test.